VTS 2007 - Call for Papers

CALL FOR PAPERS

Scope -- Author Information -- Committees

Scope

The IEEE VLSI Test Symposium (VTS) celebrates it’s twenty-fifth year of exploring trends and novel concepts in testing, and verification/validation of microelectronic circuits and systems. Major topics include, but are not limited to:

Analog, M-S & RF Test
Automatic Test Generation
ATE Architecture & SW
Board & System Test
Built-In Self-Test (BIST)
Current Based Test
Defect Tolerance
Delay & Performance Test
Design for Testability (DFT)
Design Verification/Validation
Diagnosis and Debug
Embedded System Test
Embedded Test Methods
Fault Modeling & Simulation
Infrastructure IP
MEMS Test
Memory Test and Repair
Microprocessor Test
Multi-Chip Module Test
Nanometer Technologies Test
On-Line Test
Power Issues in Test
Self-Repair & Fault Tolerance
System-on-Chip (SoC) Test
System-in-Package Test
Test Resource Partitioning
Thermal Test
Test Data Compression
Test of High-Speed I/
Test Quality and Reliability
Test Resource Partitioning
Transients and Soft Errors
Yield Analysis & Optimization

Author Information

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The VTS 2007 website is open for submissions:

http://www.tttc-vts.org/public_html/new/2007/submissions.php

The VTS Program Committee invites original, unpublished paper submissions for VTS 2007. Paper submissions should be complete manuscripts, not exceeding six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, fax number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

Proposals for the Innovative Practices Track, and Special Sessions are also invited. The innovative practices track will highlight cutting-edge challenges faced by test practitioners, and innovative solutions employed to address them. Special sessions can include panels, embedded tutorials, or hot topic presentations. Innovative practices track and special session proposals should include a title, name and contact information of the session organizer(s), a 150 to 200 word abstract, and a list of prospective participants.

All submissions are to be made electronically through the VTS website. The deadline for all submissions is October 9th, 2006. Authors will be notified of the disposition of their papers by January 8th, 2007. A submission will be considered as evidence that, upon acceptance, the author(s) will present the paper at the symposium, and will submit a final camera-ready version of the paper for inclusion in the proceedings. In the case of innovative practice and special sessions, the organizers commit to submitting a session title, abstract, and list of participants for inclusion in the symposium proceedings and program.

VTS 2007 will present a Best Paper Award, a Best Panel Award, and a Best IP Track Session Award based on the evaluations of reviewers, attendees, and an invited panel of judges. TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics will be offered during VTS 2007. Tutorial proposals should be submitted according to TTEP 2007 submission deadlines (http://computer.org/tab/tttc/teg/ttep).

For general information:

GENERAL CHAIR
Paolo Prinetto
Politecnico di Torino
Dip. di Automatica e Informatica
Corso Duca degli Abruzzi 24
I-10129 Torino TO, Italy.
T: +39-011-564-7007
E: Paolo.Prinetto@polito.it

For submission related information:

PROGRAM CHAIR
Alex Orailoglu
University of California, San Diego
Dept. of Computer Science and Eng.
9500 Gilman Drive, Mail Code 0114
La Jolla, CA 92093-0114, USA
T: +1-858-534-0914
E: alex@cs.ucsd.edu

Committees

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General Chair
P. Prinetto - Poli. di Torino

Program Chair
A. Orailoglu - UC San Diego

Vice-General Co-Chairs
S. M. Reddy - U Iowa
H.-J. Wunderlich - U Stuttgart

Vice-Program Co-Chairs
J. Segura - U Illes Balears
B. West - Credence

New Topics
B. Courtois - TIMA

Special Sessions
P. Maxwell - Avago
C. Metra - U Bologna

Innovative Practices Track
K. Hatayama - Renesas
S. Mitra - Intel

Publicity
A. Raghunathan - NEC

Audio/Visual
D. Gizopoulos - U Piraeus

Finance
M. Abadir - Freescale

Publications
S. Ravi - NEC

Local Arrangements
M. Renovell - LIRMM

Ex-Officio
Y. Zorian - Virage Logic

Steering Committee
J. Figueras - U Poli. Catalunya
A. Ivanov - UBC
M. Nicolaidis - TIMA
R. Roy - Zenasis
A. Singh - Auburn U
P. Varma - Blue Pearl
Y. Zorian - Virage Logic

For more information, visit us on the web at: http://www.tttc-vts.org

The 25th IEEE VLSI TEST SYMPOSIUM (VTS 2007) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).

TTTC's Electronic Broadcasting Service
	25th IEEE VLSI TEST SYMPOSIUM (VTS 2007) May 6th - May 10th, 2007 Northern California, USA http://www.tttc-vts.org